The present invention generally relates to a system control technique, and in addition, a technique which can be effectively applied to a system for combining a microprocessor and its peripheral controller LSIs. More specifically, this invention pertains to a technique which can be effectively utilized in a CRT controller constituting a part of a system such as a personal computer which is equipped with a graphic display function, for example.
Personal computers heretofore have been known which have a CRT (cathode ray tube) display unit in a raster scanning system which is arranged to have a graphic image processing function. Such a personal computer is constituted by a system as shown in FIGS. 4A and 4B.
The systems shown in FIGS. 4A and 4B are respectively constituted by a microprocessor 1 (hereinafter referred to as an "MPU"), a system ROM 2 (or read only memory) in which a system program is stored, a working RAM 3 (or random access memory) which is used as a work area and a text area when the MPU 1 is operating, a drawing memory 5 such as a refresh memory or a frame buffer for storing the drawing data which is displayed on the CRT display unit, a CRT controller 4 for writing the drawing data into and reading it from the drawing memory 5 in accordance with the command of the MPU 1, a parallel to serial converter 6 (or a video controller) for forming and outputting a video signal such as an RGB (red, green and blue) signal on the basis of the drawing data which is read from the drawing memory 5, and so forth.
The above-described graphic display system is shown in "Nikkei Electronics", May 21, 1984, No. 343, Pgs. 225 through 227, published by Nikkei McGRAW-HILL.
Referring to FIG. 4A, the system shown has the most common construction employing a CRT controller 4 which can read from the drawing memory 5, but cannot write thereinto. In this case, although the controller 4 has a display function, it does not have any drawing function. Such a system is arranged such that the MPU 1 writes into the drawing memory 5 the drawing data which is to be displayed on the CRT display unit. Therefore, the address data which is supplied to the drawing memory 5 when the MPU 1 is to write the drawing data into the drawing memory 5 from bus 8 via bus driver 15 is not necessarily the same as the address data which is used when the CRT controller is to read the drawing data from the drawing memory 5. For this reason, the address data is supplied to the drawing memory 5 through the switching operation of a multiplexer 7.
However, since the system having such a construction is arranged such that the MPU 1 alone must perform the writing of the drawing data, this arrangement places a heavy load on the MPU 1. In addition, the address data on the drawing memory 5 must not exceed the capacity of the address space of the MPU 1, so that it is impossible to enlarge the capacity of the drawing memory 5. As a result, it has been impossible to enlarge the capacity of the drawing memory 5 in order to display multi-color data on a CRT display screen or increase the number of display screens.
In contrast, FIG. 4B shows a system construction employing a CRT controller such as HD63484 (a tradename) which has a drawing function relating to the drawing memory 5, which is connected to the CRT controller via latch circuit 16. In this system, the drawing memory 5 is perfectly separated from a system bus 8 of the MPU 1. Since such a system is arranged such that drawing data is read from and written into the drawing memory 5 exclusively via the CRT controller 4, the load borne by the MPU 1 can be greatly reduced. In addition, the address data on the drawing memory 5 may exceed the address space of the MPU 1, so that it becomes possible to enlarge the capacity of the drawing memory 5. As a result, a vivid polychrome graphic display is possible.
However, the system shown in FIG. 4B is arranged such that the drawing memory 5 is accessed exclusively via the CRT controller 4. Accordingly, this system involves such difficulties as might be caused by the fact that when DMA (direct memory access) transfer is to be performed between the RAM 3 incorporated in the system and the drawing memory 5, since the accessed data must be transferred through the CRT controller 4, the transfer speed slows down accordingly. Also, in the system shown in FIG. 4B, the MPU 1 cannot directly write into the drawing memory 5, so that it is impossible for the MPU 1 to directly execute a function or operation which is not incorporated in the CRT controller 4 (for example, the rotation of a picture image).